Electrically Erasable Programmable Read-Only Memory (EEPROM) is a user modifiable Read Only Memory (ROM) that can be written to repeatedly through applications with higher than normal electrical voltage. Unlike Erasable Programmable Read-Only Memory (EPROM), EEPROM does not need to be removed from a computing device to be modified.
A single type and vendor specific memory module is defined within an EEPROM, via a Serial Presence Detect (SPD) data structure. A single memory module can define a variety of types of memory, such as Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDR SDRAM), Magnetoresistive Random Access Memory (MRAM), flash memory, image memory, and other types of memory.
In order for a memory module to properly configure itself within a computing device at start up or boot up, a number of configuration attributes associated with that memory module must be defined in the EEPROM on a memory module via the SPD data structure. However, each type of vendor specific memory module can include a variety of physical and performance characteristics associated with a plurality of needed memory components.
Thus, in order to permit interoperability between varying types of vendor specific memory modules to be automatically operational and configured within a variety of disparate computing devices and platforms, the memory industry formed committees within the Joint Electron Device Engineering Council (JEDEC) with the intent of standardizing the structure and contents of the SPD data structure of an EEPROM on a memory module.
Presently, the SPD data structure is defined as a string of 256 bytes, each byte representing a particular configuration component. Some bytes are required; other bytes are optional and provide for better descriptions and information that may be useful in resolving error conditions. For each byte a variety of selectable values can be defined in hexadecimal according to rules associated with the SPD contents, which JEDEC has defined.
The standardization of the format and content of the SPD data structure for EEPROMs on memory modules has had its intended effect of permitting a variety of vendors with a variety of memory modules to automatically integrate into a plurality of disparate computing devices and environments. However, the process of generating a particular instance of SPD contents for an SPD data structure remains problematic.
This is so, because the process of generating needed instances of SPD contents remains largely a manual process fraught with time delays and errors in the industry. Typically, when a particular instance of SPD contents is needed for a particular EEPROM on a memory module a variety of internal groups of a particular vendor will assist in defining their needed components within the SPD contents. Each group will manually inspect the SPD industry standards to resolve their needed SPD values and the location within the SPD data structure where their contents are to be placed. When the entire needed SPD contents are defined, still other groups serve as quality assurance and testing to ensure no manual errors or incorrect values were produced. The entire process involves multiple individual resources and remains primarily manual. Consequently, it is not uncommon for EEPROMs on memory modules to ship with errors that were still undetected or to ship with significant production delays due in large part to the manual process used to create the needed SPD contents.
Therefore there is a need for improved and automated techniques for generating SPD contents for EEPROM on memory modules.